1. Field of the Invention
This invention relates in general to a structure and a fabrication method for a dynamic random access memory (DRAM) capacitor. More particularly, the invention relates to a fabrication method for a capacitor over bit-line (COB) DRAM device.
2. Description of the Related Art
In the current information industry, a DRAM device is a very important product. To accompany the advancement and the increased demands on a DRAM device, the DRAM device for an integrated circuit is being designed with increased memory capacity as well as device dimension miniaturization. As a result, a capacitor over bit-line type of DRAM device is being developed.
According to the conventional fabrication method for a COB DRAM device, a transistor is formed in the active region after a shallow trench isolation (STI) structure is formed in the substrate to define the active region of the memory cells. A dielectric layer is further formed to isolate the transistor, followed by forming a bit-line contact in the dielectric layer. A bit line, which is connected to the transistor, is formed on the dielectric layer and in the bit-line contact opening. After another dielectric layer is formed on the bit line, and a node contact is further formed between the two dielectric layers. A capacitor is formed on the second dielectric layer and in the node contact.
According to the above manufacturing process, the steps in forming the bit-line contact, the bit line, the node contact and the capacitor all require the employment of photolithography and etching techniques to define their positions and shapes. Planarization also required after the formation of each of the two dielectric layers to facilitate the subsequent manufacturing process. The conventional approach in forming a COB DRAM device is thus very complicated. Besides, misalignments are likely to occur in each photolithography and etching step. In addition, the formation of the node contact requires the etching of both dielectric layers. The aspect ratio of the node contact is therefore large, which increases the difficulties of the process. As a result, raising the yield for a COB DRAM device becomes very challenging.